|
6dofimu24 2.2.1
|
Settings for registers of 6DOF IMU 24 Click driver. More...
Settings for registers of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_ACCEL_CONFIG0_FS_SEL_16G 0x20 |
| #define C6DOFIMU24_ACCEL_CONFIG0_FS_SEL_32G 0x00 |
6DOF IMU 24 ACCEL_CONFIG0 register setting.
Specified setting for ACCEL_CONFIG0 register of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_ACCEL_CONFIG0_FS_SEL_4G 0x60 |
| #define C6DOFIMU24_ACCEL_CONFIG0_FS_SEL_8G 0x40 |
| #define C6DOFIMU24_ACCEL_CONFIG0_FS_SEL_MASK 0xE0 |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_1000HZ 0x06 |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_100HZ 0x08 |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_12_5HZ 0x0B |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_16000HZ 0x02 |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_1_5625HZ 0x0E |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_2000HZ 0x05 |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_200HZ 0x07 |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_25HZ 0x0A |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_32000HZ 0x01 |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_3_125HZ 0x0D |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_4000HZ 0x04 |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_500HZ 0x0F |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_50HZ 0x09 |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_6_25HZ 0x0C |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_8000HZ 0x03 |
| #define C6DOFIMU24_ACCEL_CONFIG0_ODR_MASK 0x0F |
| #define C6DOFIMU24_ACCEL_DATA_RES 0x7FFF |
| #define C6DOFIMU24_ACCEL_FS_SEL_16G 0x02 |
| #define C6DOFIMU24_ACCEL_FS_SEL_32G 0x03 |
| #define C6DOFIMU24_ACCEL_FS_SEL_4G 0x00 |
6DOF IMU 24 accel fs sel and odr setting.
Specified setting for accel full scale resolution and output data rate of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_ACCEL_FS_SEL_8G 0x01 |
| #define C6DOFIMU24_ACCEL_MIN_G 4 |
| #define C6DOFIMU24_ACCEL_ODR_1000HZ 0x09 |
| #define C6DOFIMU24_ACCEL_ODR_100HZ 0x06 |
| #define C6DOFIMU24_ACCEL_ODR_12_5HZ 0x03 |
| #define C6DOFIMU24_ACCEL_ODR_16000HZ 0x0D |
| #define C6DOFIMU24_ACCEL_ODR_1_5625HZ 0x00 |
| #define C6DOFIMU24_ACCEL_ODR_2000HZ 0x0A |
| #define C6DOFIMU24_ACCEL_ODR_200HZ 0x07 |
| #define C6DOFIMU24_ACCEL_ODR_25HZ 0x04 |
| #define C6DOFIMU24_ACCEL_ODR_32000HZ 0x0E |
| #define C6DOFIMU24_ACCEL_ODR_3_125HZ 0x01 |
| #define C6DOFIMU24_ACCEL_ODR_4000HZ 0x0B |
| #define C6DOFIMU24_ACCEL_ODR_500HZ 0x08 |
| #define C6DOFIMU24_ACCEL_ODR_50HZ 0x05 |
| #define C6DOFIMU24_ACCEL_ODR_6_25HZ 0x02 |
| #define C6DOFIMU24_ACCEL_ODR_8000HZ 0x0C |
| #define C6DOFIMU24_DEVICE_ADDRESS_0 0x68 |
6DOF IMU 24 device address setting.
Specified setting for device slave address selection of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_DEVICE_ADDRESS_1 0x69 |
| #define C6DOFIMU24_DEVICE_CONFIG_SOFT_RESET 0x01 |
| #define C6DOFIMU24_DEVICE_CONFIG_SPI_MODE_0_3 0x00 |
6DOF IMU 24 DEVICE_CONFIG register setting.
Specified setting for DEVICE_CONFIG register of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_DEVICE_CONFIG_SPI_MODE_1_2 0x10 |
| #define C6DOFIMU24_DEVICE_CONFIG_SPI_MODE_MASK 0x10 |
| #define C6DOFIMU24_GYRO_CONFIG0_FS_SEL_1000DPS 0x20 |
| #define C6DOFIMU24_GYRO_CONFIG0_FS_SEL_125DPS 0x80 |
| #define C6DOFIMU24_GYRO_CONFIG0_FS_SEL_15_625DPS 0xE0 |
| #define C6DOFIMU24_GYRO_CONFIG0_FS_SEL_2000DPS 0x00 |
6DOF IMU 24 GYRO_CONFIG0 register setting.
Specified setting for GYRO_CONFIG0 register of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_GYRO_CONFIG0_FS_SEL_250DPS 0x60 |
| #define C6DOFIMU24_GYRO_CONFIG0_FS_SEL_31_25DPS 0xC0 |
| #define C6DOFIMU24_GYRO_CONFIG0_FS_SEL_500DPS 0x40 |
| #define C6DOFIMU24_GYRO_CONFIG0_FS_SEL_62_5DPS 0xA0 |
| #define C6DOFIMU24_GYRO_CONFIG0_FS_SEL_MASK 0xE0 |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_1000HZ 0x06 |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_100HZ 0x08 |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_12_5HZ 0x0B |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_16000HZ 0x02 |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_2000HZ 0x05 |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_200HZ 0x07 |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_25HZ 0x0A |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_32000HZ 0x01 |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_4000HZ 0x04 |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_500HZ 0x0F |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_50HZ 0x09 |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_8000HZ 0x03 |
| #define C6DOFIMU24_GYRO_CONFIG0_ODR_MASK 0x0F |
| #define C6DOFIMU24_GYRO_DATA_RES 0x7FFF |
| #define C6DOFIMU24_GYRO_FS_SEL_1000DPS 0x06 |
| #define C6DOFIMU24_GYRO_FS_SEL_125DPS 0x03 |
| #define C6DOFIMU24_GYRO_FS_SEL_15_625DPS 0x00 |
6DOF IMU 24 gyro fs sel and odr setting.
Specified setting for gyro full scale resolution and output data rate of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_GYRO_FS_SEL_2000DPS 0x07 |
| #define C6DOFIMU24_GYRO_FS_SEL_250DPS 0x04 |
| #define C6DOFIMU24_GYRO_FS_SEL_31_25DPS 0x01 |
| #define C6DOFIMU24_GYRO_FS_SEL_500DPS 0x05 |
| #define C6DOFIMU24_GYRO_FS_SEL_62_5DPS 0x02 |
| #define C6DOFIMU24_GYRO_MIN_DPS 15.625f |
| #define C6DOFIMU24_GYRO_ODR_1000HZ 0x06 |
| #define C6DOFIMU24_GYRO_ODR_100HZ 0x03 |
| #define C6DOFIMU24_GYRO_ODR_12_5HZ 0x00 |
| #define C6DOFIMU24_GYRO_ODR_16000HZ 0x0A |
| #define C6DOFIMU24_GYRO_ODR_2000HZ 0x07 |
| #define C6DOFIMU24_GYRO_ODR_200HZ 0x04 |
| #define C6DOFIMU24_GYRO_ODR_25HZ 0x01 |
| #define C6DOFIMU24_GYRO_ODR_32000HZ 0x0B |
| #define C6DOFIMU24_GYRO_ODR_4000HZ 0x08 |
| #define C6DOFIMU24_GYRO_ODR_500HZ 0x05 |
| #define C6DOFIMU24_GYRO_ODR_50HZ 0x02 |
| #define C6DOFIMU24_GYRO_ODR_8000HZ 0x09 |
| #define C6DOFIMU24_INT_CONFIG1_ASYNC_RESET_DIS 0x00 |
| #define C6DOFIMU24_INT_CONFIG1_ASYNC_RESET_EN 0x10 |
| #define C6DOFIMU24_INT_CONFIG1_ASYNC_RESET_MASK 0x10 |
| #define C6DOFIMU24_INT_CONFIG1_TDEASSERT_100US 0x00 |
| #define C6DOFIMU24_INT_CONFIG1_TDEASSERT_DIS 0x20 |
| #define C6DOFIMU24_INT_CONFIG1_TDEASSERT_MASK 0x20 |
| #define C6DOFIMU24_INT_CONFIG1_TPULSE_100US 0x00 |
6DOF IMU 24 INT_CONFIG1 register setting.
Specified setting for INT_CONFIG1 register of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_INT_CONFIG1_TPULSE_8US 0x40 |
| #define C6DOFIMU24_INT_CONFIG1_TPULSE_MASK 0x40 |
| #define C6DOFIMU24_INT_CONFIG_INT1_DRV_MASK 0x02 |
| #define C6DOFIMU24_INT_CONFIG_INT1_DRV_OD 0x00 |
| #define C6DOFIMU24_INT_CONFIG_INT1_DRV_PP 0x02 |
| #define C6DOFIMU24_INT_CONFIG_INT1_MODE_LATCH 0x04 |
| #define C6DOFIMU24_INT_CONFIG_INT1_MODE_MASK 0x04 |
| #define C6DOFIMU24_INT_CONFIG_INT1_MODE_PULSE 0x00 |
| #define C6DOFIMU24_INT_CONFIG_INT1_POL_HIGH 0x01 |
| #define C6DOFIMU24_INT_CONFIG_INT1_POL_LOW 0x00 |
| #define C6DOFIMU24_INT_CONFIG_INT1_POL_MASK 0x01 |
| #define C6DOFIMU24_INT_CONFIG_INT2_DRV_MASK 0x10 |
| #define C6DOFIMU24_INT_CONFIG_INT2_DRV_OD 0x00 |
| #define C6DOFIMU24_INT_CONFIG_INT2_DRV_PP 0x10 |
| #define C6DOFIMU24_INT_CONFIG_INT2_MODE_LATCH 0x20 |
| #define C6DOFIMU24_INT_CONFIG_INT2_MODE_MASK 0x20 |
| #define C6DOFIMU24_INT_CONFIG_INT2_MODE_PULSE 0x00 |
6DOF IMU 24 INT_CONFIG register setting.
Specified setting for INT_CONFIG register of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_INT_CONFIG_INT2_POL_HIGH 0x08 |
| #define C6DOFIMU24_INT_CONFIG_INT2_POL_LOW 0x00 |
| #define C6DOFIMU24_INT_CONFIG_INT2_POL_MASK 0x08 |
| #define C6DOFIMU24_INT_SOURCE0_AGC_RDY_INT1_EN 0x01 |
| #define C6DOFIMU24_INT_SOURCE0_FIFO_FULL_INT1_EN 0x02 |
| #define C6DOFIMU24_INT_SOURCE0_FIFO_THS_INT1_EN 0x04 |
| #define C6DOFIMU24_INT_SOURCE0_PLL_RDY_INT1_EN 0x20 |
| #define C6DOFIMU24_INT_SOURCE0_RESET_DONE_INT1_EN 0x10 |
| #define C6DOFIMU24_INT_SOURCE0_UI_DRDY_INT1_EN 0x08 |
| #define C6DOFIMU24_INT_SOURCE0_UI_FSYNC_INT1_EN 0x40 |
6DOF IMU 24 INT_SOURCE0 register setting.
Specified setting for INT_SOURCE0 register of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_INT_STATUS_AGC_RDY 0x01 |
| #define C6DOFIMU24_INT_STATUS_DATA_RDY 0x08 |
| #define C6DOFIMU24_INT_STATUS_FIFO_FULL 0x02 |
| #define C6DOFIMU24_INT_STATUS_FIFO_THS 0x04 |
| #define C6DOFIMU24_INT_STATUS_PLL_RDY 0x20 |
| #define C6DOFIMU24_INT_STATUS_RESET_DONE 0x10 |
| #define C6DOFIMU24_INT_STATUS_UI_FSYNC 0x40 |
6DOF IMU 24 INT_STATUS register setting.
Specified setting for INT_STATUS register of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_PWR_MGMT0_ACCEL_MODE_LN 0x03 |
| #define C6DOFIMU24_PWR_MGMT0_ACCEL_MODE_LP 0x02 |
| #define C6DOFIMU24_PWR_MGMT0_ACCEL_MODE_MASK 0x03 |
| #define C6DOFIMU24_PWR_MGMT0_ACCEL_MODE_OFF 0x00 |
| #define C6DOFIMU24_PWR_MGMT0_GYRO_MODE_LN 0x0C |
| #define C6DOFIMU24_PWR_MGMT0_GYRO_MODE_MASK 0x0C |
| #define C6DOFIMU24_PWR_MGMT0_GYRO_MODE_OFF 0x00 |
| #define C6DOFIMU24_PWR_MGMT0_GYRO_MODE_STBY 0x04 |
| #define C6DOFIMU24_PWR_MGMT0_IDLE 0x10 |
| #define C6DOFIMU24_PWR_MGMT0_TEMP_DIS 0x20 |
| #define C6DOFIMU24_PWR_MGMT0_TEMP_EN 0x00 |
6DOF IMU 24 PWR_MGMT0 register setting.
Specified setting for PWR_MGMT0 register of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_PWR_MGMT0_TEMP_MASK 0x20 |
| #define C6DOFIMU24_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE |
Data sample selection.
This macro sets data samples for SPI modules.
| #define C6DOFIMU24_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE |
| #define C6DOFIMU24_TEMP_OFFSET 25 |
| #define C6DOFIMU24_TEMP_RES 132.48f |
6DOF IMU 24 temperature calculation setting.
Specified setting for temperature calculation of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_USER_BANK_0 0x00 |
6DOF IMU 24 USER BANK register selection.
Specified setting for USER BANK register selection of 6DOF IMU 24 Click driver.
| #define C6DOFIMU24_USER_BANK_1 0x01 |
| #define C6DOFIMU24_USER_BANK_2 0x02 |
| #define C6DOFIMU24_USER_BANK_4 0x04 |
| #define C6DOFIMU24_WHO_AM_I 0x3B |
6DOF IMU 24 WHO_AM_I register setting.
Specified setting for WHO_AM_I register of 6DOF IMU 24 Click driver.