Settings for registers of PIR 3 Click driver.
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Settings for registers of PIR 3 Click driver.
◆ PIR3_CONFIG_DETLVL_DEFAULT
| #define PIR3_CONFIG_DETLVL_DEFAULT 0x1C |
◆ PIR3_CONFIG_DETLVL_MASK_LSB
| #define PIR3_CONFIG_DETLVL_MASK_LSB 0x01 |
◆ PIR3_CONFIG_DETLVL_MASK_MSB
| #define PIR3_CONFIG_DETLVL_MASK_MSB 0x7F |
PIR 3 control register setting.
Specified setting for control register of PIR 3 Click driver.
◆ PIR3_CONFIG_FILSEL_DEFAULT
◆ PIR3_CONFIG_FILSEL_DIRECT
| #define PIR3_CONFIG_FILSEL_DIRECT 0x03 |
◆ PIR3_CONFIG_FILSEL_MASK
| #define PIR3_CONFIG_FILSEL_MASK 0x07 |
◆ PIR3_CONFIG_FILSEL_TYPE_A
| #define PIR3_CONFIG_FILSEL_TYPE_A 0x07 |
◆ PIR3_CONFIG_FILSEL_TYPE_B
| #define PIR3_CONFIG_FILSEL_TYPE_B 0x00 |
◆ PIR3_CONFIG_FILSEL_TYPE_C
| #define PIR3_CONFIG_FILSEL_TYPE_C 0x01 |
◆ PIR3_CONFIG_FILSEL_TYPE_D
| #define PIR3_CONFIG_FILSEL_TYPE_D 0x02 |
◆ PIR3_CONFIG_FSTEP_1
| #define PIR3_CONFIG_FSTEP_1 0x01 |
◆ PIR3_CONFIG_FSTEP_2
| #define PIR3_CONFIG_FSTEP_2 0x03 |
◆ PIR3_CONFIG_FSTEP_3
| #define PIR3_CONFIG_FSTEP_3 0x00 |
◆ PIR3_CONFIG_FSTEP_DEFAULT
◆ PIR3_CONFIG_FSTEP_MASK
| #define PIR3_CONFIG_FSTEP_MASK 0x03 |
◆ PIR3_CONFIG_TRIGOM_DEFAULT
◆ PIR3_CONFIG_TRIGOM_DISABLED
| #define PIR3_CONFIG_TRIGOM_DISABLED 0x00 |
◆ PIR3_CONFIG_TRIGOM_ENABLED
| #define PIR3_CONFIG_TRIGOM_ENABLED 0x01 |
◆ PIR3_CONFIG_TRIGOM_MASK
| #define PIR3_CONFIG_TRIGOM_MASK 0x01 |
◆ PIR3_DEVICE_ADDRESS
| #define PIR3_DEVICE_ADDRESS 0x00 |
PIR 3 device address setting.
Specified setting for device slave address selection of PIR 3 Click driver.