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adac4 2.2.0
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Settings for registers of ADAC 4 Click driver. More...
Settings for registers of ADAC 4 Click driver.
| #define ADAC4_ADC_DAC_CFG_ADC_BUFFER_EN 0x0100 |
| #define ADAC4_ADC_DAC_CFG_ADC_RANGE_2X 0x0020 |
| #define ADAC4_ADC_DAC_CFG_DAC_RANGE_2X 0x0010 |
| #define ADAC4_ADC_DAC_CFG_DAC_WRITE_ALL 0x0040 |
| #define ADAC4_ADC_DAC_CFG_GPIO_LOCK 0x0080 |
| #define ADAC4_ADC_DAC_CFG_PRE_CHARGE_EN 0x0200 |
ADAC 4 ADC_DAC_CFG register setting.
Specified setting for ADC_DAC_CFG register of ADAC 4 Click driver.
| #define ADAC4_ADC_DATA_ADDR_MASK 0x7000 |
| #define ADAC4_ADC_DATA_DATA_MASK 0x0FFF |
| #define ADAC4_ADC_DATA_MSB 0x8000 |
ADAC 4 ADC_DATA register setting.
Specified setting for ADC_DATA register of ADAC 4 Click driver.
| #define ADAC4_ADC_SEQ_ADC0_SEL 0x0001 |
| #define ADAC4_ADC_SEQ_ADC1_SEL 0x0002 |
| #define ADAC4_ADC_SEQ_ADC2_SEL 0x0004 |
| #define ADAC4_ADC_SEQ_ADC3_SEL 0x0008 |
| #define ADAC4_ADC_SEQ_ADC4_SEL 0x0010 |
| #define ADAC4_ADC_SEQ_ADC5_SEL 0x0020 |
| #define ADAC4_ADC_SEQ_ADC6_SEL 0x0040 |
| #define ADAC4_ADC_SEQ_ADC7_SEL 0x0080 |
| #define ADAC4_ADC_SEQ_REP_EN 0x0200 |
ADAC 4 ADC_SEQ register setting.
Specified setting for ADC_SEQ register of ADAC 4 Click driver.
| #define ADAC4_ADC_SEQ_TEMP_EN 0x0100 |
| #define ADAC4_CHANNEL_0 0 |
ADAC 4 channel selection setting.
Specified setting for channel selection of ADAC 4 Click driver.
| #define ADAC4_CHANNEL_1 1 |
| #define ADAC4_CHANNEL_2 2 |
| #define ADAC4_CHANNEL_3 3 |
| #define ADAC4_CHANNEL_4 4 |
| #define ADAC4_CHANNEL_5 5 |
| #define ADAC4_CHANNEL_6 6 |
| #define ADAC4_CHANNEL_7 7 |
| #define ADAC4_CHIP_ID 0x0808 |
ADAC 4 CHIP_ID register setting.
Specified setting for CHIP_ID register of ADAC 4 Click driver.
| #define ADAC4_DAC_DATA_ADDR_MASK 0x7000 |
| #define ADAC4_DAC_DATA_DATA_MASK 0x0FFF |
| #define ADAC4_DAC_DATA_MAX 4095 |
| #define ADAC4_DAC_DATA_MIN 0 |
| #define ADAC4_DAC_DATA_MSB 0x8000 |
ADAC 4 DAC_DATA register setting.
Specified setting for DAC_DATA register of ADAC 4 Click driver.
| #define ADAC4_DAC_SEL_ALL_CHANNELS 0x00FF |
| #define ADAC4_DAC_SEL_CHANNEL_0 0x0001 |
| #define ADAC4_DAC_SEL_CHANNEL_1 0x0002 |
| #define ADAC4_DAC_SEL_CHANNEL_2 0x0004 |
| #define ADAC4_DAC_SEL_CHANNEL_3 0x0008 |
| #define ADAC4_DAC_SEL_CHANNEL_4 0x0010 |
| #define ADAC4_DAC_SEL_CHANNEL_5 0x0020 |
| #define ADAC4_DAC_SEL_CHANNEL_6 0x0040 |
| #define ADAC4_DAC_SEL_CHANNEL_7 0x0080 |
ADAC 4 DAC_SEL register setting.
Specified setting for DAC_SEL register of ADAC 4 Click driver.
| #define ADAC4_DEVICE_ADDRESS_0 0x10 |
ADAC 4 device address setting.
Specified setting for device slave address selection of ADAC 4 Click driver.
| #define ADAC4_DEVICE_ADDRESS_1 0x11 |
| #define ADAC4_POWER_DOWN_CTRL_EN_REF 0x0200 |
| #define ADAC4_POWER_DOWN_CTRL_PD0 0x0001 |
| #define ADAC4_POWER_DOWN_CTRL_PD1 0x0002 |
| #define ADAC4_POWER_DOWN_CTRL_PD2 0x0004 |
| #define ADAC4_POWER_DOWN_CTRL_PD3 0x0008 |
| #define ADAC4_POWER_DOWN_CTRL_PD4 0x0010 |
| #define ADAC4_POWER_DOWN_CTRL_PD5 0x0020 |
| #define ADAC4_POWER_DOWN_CTRL_PD6 0x0040 |
| #define ADAC4_POWER_DOWN_CTRL_PD7 0x0080 |
| #define ADAC4_POWER_DOWN_CTRL_PD_ALL 0x0400 |
ADAC 4 POWER_DOWN_CTRL register setting.
Specified setting for POWER_DOWN_CTRL register of ADAC 4 Click driver.
| #define ADAC4_TEMP_OFFSET 1024.0 |
ADAC 4 temperature calculation setting.
Specified setting for temperature calculation of ADAC 4 Click driver.
| #define ADAC4_TEMP_RES 16.0 |
| #define ADAC4_VREF_INT 2.5 |
ADAC 4 VREF setting.
Specified setting for VREF of ADAC 4 Click driver.